The present invention relates to the configuration of a thin-film transistor used in an electro-optical device such as a liquid crystal display device.
In an electro-optical device that is represented by an active matrix type liquid crystal display device, there is known a configuration in which thin-film transistors (TFTs) are used as drive elements and switching elements. Thin-film transistors are configured using a semiconductor (usually, silicon semiconductor) thin film that is formed on a glass substrate by vapor-phase deposition. Thin-film transistors are also used for an image sensor and other devices.
FIGS. 4(A) and 4(B) are a sectional view and a top view, respectively, of a one-pixel portion of an active matrix circuit using conventional thin-film transistors. FIG. 4(A) is taken along line A-A′ in FIG. 4(B). A thin-film transistor whose cross-section is shown in FIG. 4(A) is composed of a glass substrate 401, an amorphous silicon or crystalline silicon semiconductor active layer formed on the glass substrate 401 and having a source region 402, a channel forming region 403 and a drain region 404, a gate insulating film 405 made of silicon dioxide or silicon nitride, an interlayer film 407 made of silicon dioxide, a drain contact portion 412, a source contact portion 411, a drain electrode 410, and a transparent conductive film (ITO film or the like) 408 that is connected to the drain electrode 410 and constitutes a pixel electrode. (The source and drain are reversed for a certain operation of the TFT.)
The source region 402 of the thin-film transistor shown in FIG. 4(A) is connected to a source line 409 via the source contact portion 411. A gate electrode 406 is connected to a gate line 413. While usually the source line 409 and the gate line 413 are perpendicular to each other, this is not always the case. In general, the gate electrode 406 and the gate line 413 are made of a metal such as aluminum or a semiconductor such as polysilicon added with phosphorus.
FIGS. 4(A) and 4(B) show a single pixel. Actually, an active matrix circuit is formed by disposing at least one pixel as shown in FIGS. 4(A) and 4(B) at each intersection of the source lines and the gate lines. A liquid crystal panel is configured by sealing a liquid crystal material between an active matrix substrate on which the active matrix circuit is formed and an opposed substrate. There are following types of liquid crystal display devices that use the liquid crystal panel having the above configuration.
(1) Liquid crystal display is realized by applying light (back light) to the liquid crystal panel.
(2) A video image is produced by applying high-intensity light to the liquid crystal display panel and projecting, onto a screen, light that is transmitted from the liquid crystal panel. (Liquid crystal projector)
(3) A reflecting plate is disposed on the back side of the liquid crystal display panel, and display is effected by causing external light to be reflected by the reflecting plate.
In particular, where light is irradiated from the glass substrate side in cases (1) and (2) above, it is necessary to shield the active layer, particularly the channel forming region, from the illumination light. This originates from the fact that the active layer (semiconductor layer denoted by 402-404 in FIGS. 4(A) and 4(B)) is made of amorphous silicon or crystalline silicon such as polysilicon. In general, the resistance of a silicon semiconductor varies when it receives light. In particular, when an amorphous silicon or crystalline silicon film is used, which includes dangling bonds, its electrical characteristics are greatly varied by illumination with high-intensity light. Further, the resistance of an intrinsic semiconductor (used for the channel forming region) is varied more greatly by illumination with light than an N-type or P-type semiconductor (used for the source and drain regions) Therefore, it is absolutely necessary to prevent the channel forming region from being illuminated.
Where light 414 is incident from above the gate electrode 406 in the thin-film transistor (top gate TFT) having the structure in which the gate electrode 406 is located over the semiconductor active layer (see FIG. 4(A)), it seems that no light may enters the channel forming region 403 due to the gate electrode 406 serving as a mask.
Actually, however, part of the incident light goes around the gate electrode 406, to enter the channel forming region 403. As a result, the conductivity of the channel forming region 403 is varied by the illumination and its characteristics are also varied.
That is, it is impossible for only the gate electrode 406 to completely prevent light from entering the channel forming region 403. This problem is remarkable when the channel forming region and the gate electrodes are formed in a self-aligned manner. To solve this problem, a light shielding layer or film is effectively used, but this increases the number of manufacturing steps.